Describe how dynamic voltage scaling can reduce dynamic power dissipation

Dynamic voltage scaling (DVS):

• Systems can save large amounts of energy by reducing the clock frequency, then reducing the supply voltage.
• This is called dynamic voltage scaling (DVS) or dynamic voltage/frequency scaling (DVFS).
• It determines the supply voltage and clock frequency sufficient to complete the workload on schedule or to maximize performance without overheating.

Frequency:

• Dynamic power is directly proportional to frequency, so a chip should not run faster than necessary.
• Reducing the frequency allows downsizing transistors or using a lower supply voltage.

Low Power Architecture

1. Device Level
2. Low Capacitance in device and Multi Threshold Devices
3. DVFS – Dynamic Voltage Frequency Scaling
4. Multi VDD
5. Gate Sizing
6. Voltage Islands
7. Power Gating
8. Clock Gating
9. Parallelism and Pipelined micro-architecture

Parallel Computations

• Multiple cores

• Multiple Issue pipelines

• Linear power increase

Pipelining

• Faster clock

• Exponential power increase

• Longer branch miss-predictions