What are the disadvantages of using a pseudo nMOS gate instead of a full CMOS gate?

What is the drawback of pseudo nMOS logic?

• Pseudo-nMOS gates will not operate correctly if (Maximum low level output) VOL >VIL (Maximum low level input) of the receiving gate.
• Ratioed circuits dissipate power continually in certain states and have poor noise margin.
• Ratioed circuits used in situations where smaller area is needed.